AMD ASP Cryptographic CoProcessor ("Turin")
Caveat: When operated in approved mode. No assurance of minimum security of SSPs (e.g., keys, bit strings) that are externally loaded, or of SSPs established with externally loaded SSPs
Certificate
| Certificate number | 5085 |
|---|---|
| Standard | FIPS 140-3 |
| Status | active |
| Sunset date | 2030-10-21 |
| Overall level | 1 |
| Module type | Hardware |
| Embodiment | Single Chip |
| Vendor | Advanced Micro Devices (AMD) · website |
Module description
The AMD ASP Cryptographic CoProcessor cryptographic module defined as a sub-chip hardware module in a single chip embodiment, with hardware and firmware components implementing general purpose cryptographic algorithms.
Security level exceptions
- Software/Firmware security: Level 3
- Non-invasive security: N/A
- Life-cycle assurance: Level 2
- Mitigation of other attacks: N/A
Validation history
| Date | Type | Lab |
|---|---|---|
| 2025-10-22 | Initial | atsec information security corporation |
Status timeline
As observed by this tracker's snapshots. NIST publishes no dates for list moves; observation began 2026-08-21, so earlier changes carry no date.
- 2026-08-21: first observed by this tracker, status active
- Validation dates on record: 2025-10-22